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APW7075
Step-Up Converter and LDO Combo
Features * * * *
Built-In a 500mA LDO and Synchronous Step-Up DC-DC Converter Built-In PWM/PFM Operating Mode Provided Dual Input Power Sources Connect FB to OUT for 3.3V Output Voltage or GND for 2.5V Output Voltage or an External Resistor Divider for Adjustable Output Voltage.
General Description
The APW7075 is a PWM/PFM, high-efficiency and step-up DC-DC converter with an integrated LDO input switch for dual mode application. During battery mode operation, the APW7075 acts as synchronous rectifier and step-up DC-DC converter with a fixed or adjustable output voltage. When the VIN pin sense 5V input voltage, the APW7075 is switched to LDO operation mode, maintaining the constant output voltage. The input voltage ranges from 0.6 V to 4.5V for stepup DC-DC converter. The start-up is guaranteed at1V and the device is operating down to 0.6V. When the device is at LDO operating mode, the suitable output voltage 3.3V and loading current 500mA for maximum power consumption are guaranteed. The APW7075 is suited for dual mode and portable battery powered appliance with low-battery detector. In dual-mode applications, the APW7075 draws power from any available 5V USB connection and reverts to battery power when the USB power is removed.
* * * * * * * * * *
Fixed 300KHz Operating Frequency High Efficiency Up to 94% at 200mA Output Current 0.6V to 4.5V Operating Voltage 1V Start Up Input Voltage Low Battery Voltage Detection Reverse Voltage Protection Internal Synchronous Rectifier Automatic Detection Input Voltage Compact SOP-8-P and TSSOP-8 Packages Lead Free Available (RoHS Compliant)
Applications * * * * *
Dual Mode Power System USB Peripheral Camcorders and Digital Camera Hand-held Instrument PDAs
Pin Description
TSSOP-8 Top View
VIN FB SHDN LBI
SOP-8-P Top View
VIN FB SHDN LBI
1 2 3 4
8 7 6 5
OUT LX GND LBO
1 2 3 4
8 7 6 5
OUT LX GND LBO
= Thermal Pad (connected to GND plane for better heat dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.5 - Aug., 2005 1 www.anpec.com.tw
APW7075
Ordering and Marking Information
APW7075 Lead Free Code Handling Code Temp. Range Package Code APW7075 KA : APW7075 O : APW7075 XXXXX APW7075 XXXXX Package Code KA : SOP-8-P O : TSSOP-8 Temp. Range C : 0 to 70 C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device XXXXX - Date Code XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.
Block Diagram
VIN SHDN
VDD FB Y VDD Current Limit Vref VDD P-MOS VDD Vref Q2 P-MOS A B C phase compensation Y Q1
VOUT A GND B R1,R2 C
OUT
VDD PWM/ PFM controller Drive Q3 Oscillator N-MOS voltage reference soft-start Q4 Vref 2 SHDN
LX
FB GND LBI
LBO
N-MOS
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APW7075
Absolute Maximum Ratings
Symbol VOUT VIO TA TJ TSTG TS Parameter Supply voltage(OUT to GND) Input / output pins Operating Ambient Temperature Range Junction Temperature Range Storage Temperature Range Soldering Temperature Value -0.3 to 6.0 -0.3 to 6.0 0 to 85 0 to 150 -65 to +150 300, 10 seconds Unit V V C C C C
Thermal Characteristics
Symbol R JA Parameter Thermal Resistance - Junction to Ambient SOP-8 SOP-8-P TSSOP-8 Value 124 80 160 Unit C/W
Electrical Characteristics
VBAT = 2V, FB = OUT (VOUT = 3.3V), RL = , TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.
Symbol
Parameter
Test Conditions
APW7075 Min. Typ. Max.
Unit
Step-up section Minimum Operating Input VBAT Voltage (Note1) Operating Voltage Start-up Voltage FSW DMAX Operating Frequency Maximum PWM Duty Cycle RL = 3K VOUT = 3.3VX96% VOUT = 3.3VX96% ILX = 100mA ILX = 100mA
0.6 0.6 0.9 300 90 0.3 0.6 0.6 0.9 4.5 1
V V V kHz %
Power MOSFET RDS(on)-N Active Switch ON Resistance Synchronous Switch on RDS(ON)-P Resistance Control Output Voltage Output Voltage Range
FB = OUT, ILOAD = 0mA FB = GND, ILOAD = 0mA External divider
3.234 2.45 2.5
3.3 2.5
3.366 2.55 5.5 150
V V V mV
VOUT
VOUT(drop) VOUT Dropping Voltage (Note 2) VOUT = 3.3V, C OUT = 100F
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APW7075
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature, 3.9VVIN<5.5V, C OUT10F, SHDN=VIN ,Typical values are at TA=+25C.)
Symbol TSS VREF IFB IDD ISHDN SHDN
Parameter Soft-start Time FB Input Threshold FB Input Current Shutdown Current SHDN Input Current Logic LOW (VIL) Logic HIGH(VIH) LBI Input Hysteresis LBI Threshold LBI Input Current LBO Logic Low
Test Conditions VOUT = 3.3V ILOAD = 0mA VFB = 1.4V VSHDN = 0 VSHDN = 0 or VOUT
APW7075 Min. Typ. 30 1.176 1.2 0.03 70 0.1 0.07 0.8 1.4 0.588 0.8 10 0.6 1 0.2 0.07 0.612 50 0.4 1 Max. 100 1.224 50 140 5 50 0.3
Unit ms V nA A A nA V V mV V nA V A
Operating Current (Note3) VOUT = 3.3VX96%, ILOAD = 0mA
VLBI ILBI VLBO ILBO
VLBI = 0.8V VLBI = 0, ISINk = 1mA
LBO Off Leakage Current VLBO = 5.5V, VLBI = 5.5V Upper VIN Threshold VIN increasing Voltage Lower VIN Threshold VIN decreasing Voltage VIN Threshold Hysteresis Output Voltage Current Limit Short Current Load Current Dropout Voltage Quiescent Current ILOAD = 500mA No load ILOAD = 500mA 4VLDO Section (Note4) VIN(upper) VIN(lower) VTH VOUT ILIM ISHORT IOUT VDROP Iq 3.75 3.65 3.9 3.8 100 VOUT-2 VOUT 1 110 0.6 800 1.1 4 20 0.9 1000 1.5 10 30 VOUT+2 4.05 3.95 V V mV V A mA mA V uA mA mV mV
REGLINE Line Regulation REGLOAD Load Regulation
Note1: The min. operating voltage is dependent on the duty cycle. Note2: The dropped output voltage is that the input power (VIN pin) is switched to battery power (LX pin), when the VIN power is removed. Note3: Device is boostrapped ( power to the IC comes from OUT). This correlates directly with the actual battery supply. Note4: If the LDO mode is used, the output voltage should be under 3.8V.
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APW7075
Pin Function Description
VIN (Pin 1) Input supply voltage for dual-mode application. Connect a schokkty diode (current rating >500mA) to USB port or 5V adapter. If the LDO mode is not used, tie the VIN pin to ground. FB (pin 2) Internal 1.2V reference voltage. Connect to OUT for 3. 3V output,. Connect to GND for 2.5V output. Use a resistor divider to set the output voltage from 2.5V to 5.5V. SHDN (pin 3) Shutdown input. High = operating mode; Low = shutdown mode. LBI (Pin 4) Low-battery comparator input. Internally set to trip at 0.6V. LBO (pin 5) Open-drain low battery comparator output. Connect LBO to OUT through a 100K resistor. Output is low as VLBI < 0.6V. Open-drain device is turned on during shutdown. OUT (pin 8) Power output. OUT provides bootstrap power to the IC. GND (Pin 6) Ground pins of the circuitry and all ground pins must be soldered to PCB with proper power dissipation. LX (pin 7) N-channel and P-channel power MOSFET drain connection.
Application Schematic
VBAT
C1 10uF L1 22UH
1N5817
Adapter C3 5V 10uF
R6
VOUT 3.3V 1 2 8 OUT 7 FB 3 SHDN GND 5 LBI LBO
100k[ R5 C4 1uF C2 100uF
VIN
ON
LX 6
OFF
R3
4
APW7075
R4
Low Battery Output
Connect the R6=500[ to 1k[ to GND Figure 1. Dual Model : 3.3V Output Voltage
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APW7075
Application Schematic (Cont.)
VBAT
C1 10uF L1 22UH
1N5817
Adapter C3 5V 10uF
R6
VOUT 2.5V 1 VIN 2 OUT 7 LX 6 GND 5 LBI LBO
100k[ R5 C4 1uF C2 100uF
8
ON 3 OFF
R3
FB SHDN
4
APW7075
R4
Low Battery Output
Connect the R6=500[ to 1k[ to GND Figure 2. Dual Model : 2.5V Output Voltage
VBAT
L1 22UH
1N5817
C1 10uF
2.5V O VOUT O 3.8V Adapter C3 5V 10uF
R6 R1 300k[
VOUT 3.6V 1 2 8 OUT 7 LX 6 GND 5 LBI LBO
100k[ R5 C4 1uF C2 100uF
VIN FB SHDN
ON 3 OFF 4
R2 150k[ R4
APW7075 Low Battery Output
Connect the R6=500[ to 1k[ to GND Figure 3. Dual Model: Adjustable Output Voltage
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APW7075
Application Schematic (Cont.)
0.6V O VBAT
C1 10uF L1 22UH
VBAT O 4.5V
2.5V O
R1 300k[
VOUT O 5V 3.6V
VOUT 1 2 8 OUT LX GND LBO
100k[
VIN FB SHDN LBI
7 6 5
ON 3 OFF
R3 R2 150k[ R4
C4 1uF
C2 100uF
4
APW7075 Low Battery Output
Figure 4. Single Boost Converter
Typical Characteristics
Power Up (VBATTERY=2.4V)
IOUT=100mA
Power Up (VBATTERY=1.2V)
VBAT(1V/div) IOUT=100mA
VBAT(1V/div) VOUT(1V/div)
VOUT(1V/div) LX(2V/div) LX(2V/div)
Time(10ms/div)
Time(10ms/div)
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APW7075
Typical Characteristics (Cont.)
Power Down
IOUT=100mA VBAT(2V/div) SHDN(1V/div)
Enable
IOUT=100mA
VOUT(1V/div)
VOUT(1V/div) LX(2V/div) LX(2V/div)
Time(5ms/div)
Time(10ms/div)
Shutdown
IOUT=100mA SHDN(1V/div)
Heavy Load Operating Waveforms
IL(200mA/div)
IOUT=100mA, VOUT=3.3V VBAT=2.4V, CBAT=10F COUT=100F, L=22H
VOUT(1V/div)
LX(2V/div) LX(2V/div) LOUT(100mV/div)
Time(1ms/div)
Time(1us/div)
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APW7075
Typical Characteristics (Cont.)
Light Load Operating Waveforms
1.4 1.2
Output Current vs. Start-up Voltage
Start-up Voltage(V)
IL(200mA/div) IOUT=30mA, VOUT=3.3V VBAT=2.4V, CBAT=10F COUT=100F, L=22H
1 0.8 0.6 0.4 0.2
LX(2V/div)
LOUT(100mV/div)
0 0.1 1 10 100
Time(5us/div)
Output Current(mA)
Effciency vs. Output Current
100 90 80
Effciency vs. Output Current
100 90 80
VIN=2.4V
Effciency(%)
VIN=1.2V
60 50 40 30 20 10 0 0.01
Effciency(%)
70
70 60 50 40 30
VOUT=2.5V, L=22H VIN=1.2V
VOUT=3.3V, L=22H
20 10 0 0.01 0.1 1 10 100 1000
0.1
1
10
100
1000
Output Current(mA)
Output Current(mA)
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APW7075
Typical Characteristics (Cont.)
Efficiency vs. Output Current
100 90 80 70
VIN=2.4V
Efficiency vs. Output Current
100 90 80 70
Efficiency(%)
Efficiency(%)
60 50 40 30 20 10 0 0.01 0.1 1
60 50 40 30 20 10 0 0.01 0.1
VOUT=2.5V, L=10H VIN=1.2V
VIN=1.2V
VOUT=3.3V, L=10H
10
100
1000
1
10
100
1000
Output Current(mA)
Output Current(mA)
Maximum Output Current vs.Input Voltage
1000
Operating Curretnt into OUT vs. Output Voltage
0.5
Maximum Output Current (mA)
L=22H VOUT=3.3V VOUT=3.6V
Operating Current into OUT(mA)
FB=1.4V
0.4
750
VOUT=2.5V
0.3
500
0.2
250
VOUT=5V
0.1
0 1 1.5 2 2.5 3 3.5 4
0 0 0.5 1 1.5 2 2.5 3 3.5 4
Input Voltage(V)
Output Voltage(V)
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APW7075
Typical Characteristics (Cont.)
Transition from PFM to PWM vs. Input Voltage The transition from PFM to PWM(mA)
500
L=10H
Transition from PFM to PWM vs. Input Voltage The transition from PFM to PWM(mA)
500
L=22H
400
VOUT=3.3V VOUT=3.6V
400
300
VOUT=2.5V VOUT=5V
300
200
200
VOUT=2.5V
VOUT=3.3V
VOUT=3.6V VOUT=5V
100
100
0 1 1.5 2 2.5 3 3.5 4
0 1 1.5 2 2.5 3 3.5 4
Input Voltage(V)
Input Voltage(V)
Input Battery Current vs. Input Battery Voltage
300
Line Transient Response
VBAT(2V/div)
Input Battery Current(A)
250
200
IOUT=100mA, VOUT=3.3V VBAT=2V~3V VOUT=3.3V
150
100
VOUT=2.4V VOUT(200mV/div)
50
0 0 0.5 1 1.5 2 2.5 3
Input Battery Voltage(V)
Time(2ms/div)
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APW7075
Typical Characteristics (Cont.)
Load Transient Response
PWM to LDO
VIN(2V/div) VOUT(200mV/div) IOUT=100mA, VOUT=3.3V CIN=10F, VBAT=2.4V
VBAT=2.4V, VOUT=3.3V L=22H
VOUT(100mV/div) IOUT=10~300mA LX(2V/div)
Time(0.5ms/div)
Time(50us/div)
LDO to PWM
LDO Power Up
VIN(2V/div) IOUT=100mA, VOUT=3.3V CIN=10F, VBAT=2.4V VIN(2V/div)
IOUT=100mA
VOUT(100mV/div) VOUT(2V/div)
LX(2V/div)
IIN(1A/div)
Time(0.2ms/div)
Time(10ms/div)
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APW7075
Typical Characteristics (Cont.)
LDO Power Down
IOUT=100mA VIN(20V/div)
LDO Load Transient Response
VOUT(50mV/div)
VOUT(2V/div)
VIN=5V, VOUT=3.
IOUT=10mA~500mA IN(1A/div)
Time(10ms/div)
Time(5us/div)
LDO Load Transient Response
LBO Rising Delay Time
VOUT(50mV/div) VBAT=2.4V, VOUT=3.3V VIN=5V, VOUT=3. LBI(0.5V/div)
IOUT=10mA~500mA
LBO(2V/div)
Time(5us/div)
Time(5us/div)
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APW7075
Typical Characteristics (Cont.)
LBO Falling Delay Time
LBO Output Sink Current vs. LBO Low Voltage
30
VOUT=3.3V LBI(0.5V/div)
25
LBO Sink Current(mA)
VBAT=2.4V, VOUT=3.3V
20
15
10
LBO(2V/div)
5
0 0 0.25 0.5 0.75 1 1.25 1.5
Time(5us/div)
LBO Output Low Voltage(V)
LDO Current Limit vs. LDO Input Voltage
1.2
LDO Quiescent Current vs. LDO Input Voltage
2 1.8
LDO Quiescent Current (A)
1
1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0
LDO Current Limit(A)
0.8
IOUT=10mA
0.6
0.4
IOUT=0mA
0.2
0 4 4.5 5 5.5 6
4
4.5
5
5.5
6
LDO Input Voltage(V)
LDO Input Voltage(V)
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APW7075
Typical Characteristics (Cont.)
Quiescent Current vs. LDO Output Current
1.2
Dropout Voltage vs. LDO Output Current
700
VOUT=4.2V
1
VIN=5V
600
Quiescent Current (mA)
Dropout Voltage (mV)
500 400 300 200 100 0
0.8
0.6
0.4
0.2
0 0 100 200 300 400 500
0
100
200
300
400
500
LDO Output Current(mA)
LDO Output Current(mA)
Output Voltage vs. LDO Input Voltage
3.303 Iout=0mA 3.302
3.3
Output Voltage vs. Temperature
IOUT=0mA
3.295
Output Voltage (V)
Output Voltage (V)
3.301 3.3 3.299 3.298 3.297 4 4.5 5 5.5 6
3.29
3.285
3.28
3.275
3.27 -40
-20
0
20
40
60
80
100
120
140
LDO Input Voltage(V)
Temperature (J )
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APW7075
Function Description
PFM Control Scheme The APW7075 features the PFM control scheme to improve the efficiency during light load. In PFM mode, the inductor stores the energy during internal N-channel MOSFET turns on, and the energy is transferred to output capacitors and load during internal P-channel MOSFET turns on. If the energy which is charged to output capacitors exceeds the requirement of load, the current will reverse from output capacitors to inductor and input capacitors. The PFM comparator compares the source (OUT) and drain (LX) of the internal P-channel MOSFET. When the current that flows through the internal P-channel MOSFET is backward (from OUT to LX), the internal P-channel MOSFET will be turned off, and the output capacitor supplies the load and maintains the output voltage. During PFM mode, the IC switches only as need to serve the load, reducing the switching frequency and associated losses in the internal switches and the external inductor. Some jitter is normal during transition from PFM to PWM mode; the transition of the PFM to PWM is dependent on the inductance values, VIN, and VOUT. The output ripple is higher during PFM operation, a larger output capacitor can be used to minimize the output ripple. Synchronous Rectification The APW7075 has an internal N-channel and a P-channel MOSFET, it is no need for external components, the internal low RDS(ON) P-channel MOSFET replaces the discrete Schottky diode, and it is reducing cost and board space. During the cycle off time, the P-channel MOSFET turns on, and the power
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dissipation on the P-channel MOSFET is lower than discrete Schottky diode, thus the conversion efficiency can be improved. Shutdown The APW7075 has an active high enable function. Force SHDN high (>1.4V) to enable the step-up converter, SHDN low (<0.3V) to disable the step-up converter and the device enters shutdown mode. In shutdown mode, the converter stops switching and all internal control circuits are turned off, but the output is still applied by input voltage through the body diode of Pchannel MOSFET, it is about Vin-0.6V. Note that when the output is applied from the VIN (LDO mode), the shutdown function is disabled. Soft Start The APW7075 provides the soft-start function to get the controlled output voltage rise. When battery voltage (<1.8V) is supplied to the device and exceeds the start-up voltage, the internal N-channel and P-channel MOSFETs start to switch and pump up the output voltage to 1.8V( if the battery voltage is over 1.8V, the output voltage will equal battery voltage during this time ), which control circuitry can operate normally . The soft start controls the rise of internal reference voltage, when the internal reference voltage exceeds the feedback voltage which is divided by the resistor from output voltage, the soft-start circuit will control the output voltage until the output voltage is in regulation. The soft-start interval is approximately 30ms.
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APW7075
Function Description (Cont.)
LDO The output voltage has two operation modes. When VIN exceeds 3.9V, the output will become the LDO regulator and the step-up converter will be disabled. The LDO output is a P-channel low dropout regulator with 1A current limit. When the VIN is below 3.8V, the output will return to the step-up converter, and the LDO mode will be disabled. Note that when LDO mode is used, the output voltage should be under 3.8V Low Battery Detection The low battery detection is used to monitor the battery voltage and to generate a signal. This function includes two pins, LBI is the inverting input of the comparator and LBO is an open drain output (see block diagram). When the LBI voltage drops below the threshold voltage 0.6V, the open drain device will turn on and LBO becomes low. The Low battery threshold voltage can be programmed with a resistive divider from battery to LBI pin to ground. Since the LBO is an open drain output, it usually requires an external pull-up resistor. Inductor Selection The APW7075 works well with a 22uH inductor in most applications. The inductance values determine the inductor ripple current and affect the output current. Higher inductance values reduce ripple and improve efficiency. Lower inductance values have fast response but increase the ripple and reduce the efficiency. The maximum allowed LX current is 1A (the maximun. output current shows in Typical Characteristics) and so the peak inductor current cannot exceed it. The following equations calculate the inductor current, and The output voltage of APW7075 can be adjusted by an external resistor divider, or connect FB pin to OUT for 3.3V and to ground for 2.5V (see Application Schematic). The internal reference voltage is 1.2V and the allowed output voltage is from 2.5V to 5.5V. The following equation can be used to calculate the output voltage:
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VOUT = 1 +

R1 R2
x 1.2V
Programming Low Battery Threshold Voltage The low battery threshold voltage can be programmed with a resistive divider from battery to LBI pin to ground (see Application Schematic). The internal reference voltage is 0.6V, and the low battery threshold voltage must be below the battery voltage. The following equation can be used to calculate the low battery threshold voltage:
VBAT - TH = 1 +

R3 R4
x 0.6V
Application Information
Output Voltage Selection
output current. IOUT = IL x (1-D)
IL = (VOUT- VIN) x
Where: D=
(1- D)
Lx f
VOUT -VIN VOUT
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APW7075
Function Description (Cont.)
Inductor Selection (Cont.) The inductor' DC resistance affects the efficiency; s larger resistance dissipates more power, it should be as small as possible. It is important to choose the inductor' saturation current rating greater than the s peak current which the inductor will flow in the application. Boost Converter Input Capacitor Selection At least a 10uF input capacitor is recommended to stabilize the battery voltage and minimize the peak current ripple from the battery. LDO Input Capacitor Selection The LDO input capacitor with larger values and lower ESRs provide better PSRR and line transient response. At least a 10uF capacitor is recommended.
USB 5V
C3 10uF C4 1uF C2 100uF
Layout Considerations The correct PCB layout is important for all switching converters. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Figure. 5 illustrates the layout guidelines, the bold lines indicate the high current paths; these traces must be short and wide. The input capacitors, output capacitors, and the inductor should be as close to the IC as possible. Use a common ground plane for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground planes at a node close to the GND pin of IC. The feedback and LBI resistor dividers should be placed as close to the IC as possible.
Output Capacitor Selection The output capacitor is used for supplying the output during internal N-channel MOSFET turns on time. Larger capacitance and lower ESR reduce the output voltage ripple. The output voltage supplies the power to the IC and so the output voltage ripple must be as small as possible to provide better PSRR. In general, a 100uF to 220uF low ESR Tantalum capacitor is recommended, a 1uF ceramic capacitor in parallel for bypassing the noise is also recommended. The following equation calculates the output ripple.
Voripple= IOUTx ( VOUT - VBAT + ESR) COUTxFSW x VOUT
1 2 3 4
VIN FB SHDN LBI
OUT LX GND LBO
8 7 6 5
VOUT
C1 10uF 22UH
VBAT
APW7075
Figure 5. Recommended Layout Diagram
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APW7075
Packaging Information
SOP-8-P pin ( Reference JEDEC Registration MS-012)
E1 D1
E
H
e1 D
e2
A1
A
1 L
0.004max.
Dim A A1 D D1 E E1 H L e1 e2 1
Millimeters Min. 1.35 0 4.80 3.00REF 3.80 2.60REF 5.80 0.40 0.33 1.27BSC 8 6.20 1.27 0.51 0.228 0.016 0.013 4.00 0.150 Max. 1.75 0.15 5.00 Min. 0.053 0 0.189
0.015X45
Inches Max. 0.069 0.006 0.197 0.118REF 0.157 0.102REF 0.244 0.050 0.020 0.50BSC 8
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APW7075
Packaging Information
TSSOP-8
e 87
2x E/2 E1 E S ( 2)
GAUGE PLANE
12
e/2
D A2 A b A1
0.25
L (L1) ( 3)
1
Dim A A1 A2 b D e E E1 L L1 R R1 S 1 2 3
Millimeters Min. 0.00 0.80 0.19 2.9 0.65 BSC 6.40 BSC 4.30 0.45 1.0 REF 0.09 0.09 0.2 0 12 REF 12 REF
20
Inches Max. 1.2 0.15 1.05 0.30 3.1 Min. 0.000 0.031 0.007 0.114 0.026 BSC 0.252 BSC 4.50 0.75 0.169 0.018 0.039REF 0.004 0.004 0.008 0 12 REF 12 REF
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Max. 0.047 0.006 0.041 0.012 0.122
0.177 0.030
8
8
Copyright (c) ANPEC Electronics Corp. Rev. A.5 - Aug., 2005
APW7075
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp Critical Zone T L to T P
Ramp-up
Temperature
TL Tsmax
tL
Tsmin Ramp-down ts Preheat
25
t 25 C to Peak
Time
Classification Reflow Profiles
Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (T L) - Time (tL) Peak/Classificatioon Temperature (Tp) Time within 5C of actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3C/second max. 100C 150C 60-120 seconds 183C 60-150 seconds See table 1 10-30 seconds Pb-Free Assembly 3C/second max. 150C 200C 60-180 seconds 217C 60-150 seconds See table 2 20-40 seconds
6C/second max. 6C/second max. 6 minutes max. 8 minutes max. Time 25C to Peak Temperature Notes: All temperatures refer to topside of the package .Measured on the body surface.
Copyright (c) ANPEC Electronics Corp. Rev. A.5 - Aug., 2005 21 www.anpec.com.tw
APW7075
Classification Reflow Profiles(Cont.)
Table 1. SnPb Entectic Process - Package Peak Reflow Temperature s Package Thickness Volume mm 3 Volume mm 3 <350 350 <2.5 mm 240 +0/-5C 225 +0/-5C 2.5 mm 225 +0/-5C 225 +0/-5C
Table 2. Pb-free Process - Package Classification Reflow Temperatures Package Thickness Volume mm 3 Volume mm 3 Volume mm 3 <350 350-2000 >2000 <1.6 mm 260 +0C* 260 +0C* 260 +0C* 1.6 mm - 2.5 mm 260 +0C* 250 +0C* 245 +0C* 2.5 mm 250 +0C* 245 +0C* 245 +0C* *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0C. For example 260C+0C) at the rated MSL level.
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C, 5 SEC 1000 Hrs Bias @125C 168 Hrs, 100%RH, 121C -65C~150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA
Carrier Tape & Reel Dimensions
t E Po P P1 D
F W
Bo
Ao
D1
Ko
Copyright (c) ANPEC Electronics Corp. Rev. A.5 - Aug., 2005
22
www.anpec.com.tw
APW7075
Carrier Tape & Reel Dimensions(Cont.)
T2
J C A B
T1
Application A 330 1 S O P - 8 -P F 5.5 1 Application A 330 1 T S S O P -8 F 5.5 0. 1 B 62 +1.5 D C 12.75+ 0.15 D1 J 2 0.5 Po T1 12.4 0.2 P1 2.0 0.1 T1 12.4 0.2 P1 2.0 0.1 T2 2 0.2 Ao 6.4 0.1 T2 2 0.2 Ao 7.0 0.1 W 1 2 0. 3 Bo 5.2 0. 1 W 1 2 0. 3 Bo 3.6 0.3 P 8 0.1 Ko E 1.750.1 t
1.55 +0.1 1.55+ 0.25 4.0 0.1 B 62 +1.5 D 1.5 + 0.1 C 12.75+ 0.15 D1 1.5 + 0.1 J 2 + 0.5 Po 4.0 0.1
2.1 0.1 0.3 0.013 P 8 0.1 Ko E 1.750.1 t
1.6 0.1 0.3 0.013
(mm)
Cover Tape Dimensions
Application SOP-8-P TSSOP-8 Carrier Width 12 12 Cover Tape Width 9.3 9.3 Devices Per Reel 2500 2500
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
Copyright (c) ANPEC Electronics Corp. Rev. A.5 - Aug., 2005 23 www.anpec.com.tw

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